TY - JOUR AU - Dorostkar, Behnam AU - Marjani, Saeid PY - 2018/02/09 Y2 - 2024/03/28 TI - DC ANALYSIS OF p-n-p-n TUNNELING FIELD-EFFECT TRANSISTOR BASED ON In0.35Ga0.65As JF - HOLOS JA - HOLOS VL - 1 IS - SE - ARTIGOS DO - 10.15628/holos.2018.6173 UR - https://www2.ifrn.edu.br/ojs/index.php/HOLOS/article/view/6173 SP - 288-296 AB - Using calibrated simulations, we report the In<sub>0.35</sub>Ga<sub>0.65</sub>As based tunnel field-effect transistor (TFET) with thin ?-doped n<sup>+</sup> pocket at the source-channel interface to improve the parameters such as  on current (I<sub>on</sub>), off-current (I<sub>off</sub>) and subthreshold swing (SS). The  simulations results of proposed device is compared with analytical model that is shown  with high precision of DC parameters by examining the effects of III-V semiconductor materials. Furthermore, the influence of pocket doping, pocket width, doping level,  effective oxide thickness (EOT), temperature and mole fraction of III-V semiconductor material on device performance have  been investigated. The results show that proposed device  has a higher ON current<sub>  </sub>(1×10<sup>-5</sup> A/µm) and a steeper subthreshold swing (35 mV/decade) as compared with the conventional TFET. It shows a lot of promise for future scale CMOS  technology for low voltage and high frequency application ER -