Novel Quantum Structure of an III-V Tunneling Field-Effect Transistor with Source and Channel Heterojunction

In this work, an III-V tunneling field-effect transistor (TFET) with source and channel heterojunctions is proposed and introduced. Proposed structure combine the high tunneling efficiency induced by heterojunction material and the high mobility of III-V material. The III-V TFETs based on either source heterojunction and channel heterojunctions have been intensively researched due to their excellent subthreshold-swing characteristics. However, compared with conventional III-V TFETs, the IIIV TFETs with source and channel heterojunctions have both shorter tunneling distance and two transmission resonances that significantly improve the on-current. The transfer characteristics affected by gate length were also evaluated. The results show that on-current, off-current, and on-current/off-current ratio and subthreshold-swing of III-V TFETs with source and channel heterojunctions are about 10 A/μm, 10 A/μm, 10 and 30 mV/decade, respectively.


INTRODUCTION
Recently, tunneling field-effect transistors (TFETs) are emerged as the most attractive transistor due to their subthreshold-swing, leakage current and transconductance characteristics (Vallett, et al., 2010;Ionescu and Riel, 2011; ;Ameen, et al., 2019;Woo and Kim, 2019). Basically, the TFET is defined as a reverse biased gated p-i-n device, in which the gate controls the band-to-band tunnelling between the source and the drain through modulation of the position of energy bands. In order to occur band-to-band tunnelling in TFETs, several conditions need to be fulfilled (Ameen, et al., 2019;Marjani and Hosseini, 2015(b) ;Marjani, et al., 2017;Dorostkar and Marjani, 2018). At first, band alignment of source-channel interface and electron and hole layers of channel are formed properly. Second, the electric field is available at sourcechannel interface to reduce the tunnel barrier height and tunnel distance. Third, the electron and hole wave functions have significant overlap. Forasmuch as the valence band of source is lower than the conduction band of channel in off-state, very little current flows arising from the large tunneling barrier and distance between the source and channel. With applying the gate voltage in on-state, the energy bands of channel come down so that the conduction band of channel is located lower than valence band of source. In this way, the tunneling barrier has been eliminated and the tunneling distance has been shortened. These conditions cause the high electric field at the source-channel interface that forces the electrons to tunnel from the valence band of source to the conduction band of channel through the tunneling window between the source and the channel ; Marjani and Hosseini, 2014(b) ;Marjani, et al., 2017;Dorostkar and Marjani, 2018;Horst, et al., 2019).
In this study, an III-V tunneling field-effect transistor with source and channel heterojunctions is proposed and introduced that combine the heterojunction and III-V materials. The simulations of proposed structure were performed by 2D device simulation to meet the high-

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HOLOS, Ano 36, v.1, e8378, 2020 3 performance requirements predicted by the most recent technology roadmap. The model are given in section 2 and the proposed structures are reported in section 3. The results are discussed in section 4 and final conclusion in section 5.

MODEL
The carrier continuity equations for electron and hole are defined by (Atlas -Device Simulation Framework., 2018): where n, p, Jn, Jp, Gn, Gp Rn, Rp and q are the electron concentration, hole concentration, electron current density, hole current density, electrons generation rate, holes generation rate, electrons recombination rate, holes recombination rate and magnitude of the charge on the electron, respectively.
When a high electric field is available at source-channel interface, the carriers tunnel from from the valence band of source into the conduction band of channel. In the other words, an additional carrier is therefore generated in the conduction band that this generation is performed into the right-hand side of the above continuity equations. The nonlocal band-to-band tunneling model calculate a generation rate at each point based solely on the field value nonlocal to that point. Therfore, it need to take into account the spatial variation of the energy bands in order to model the tunneling process more accurately. The net current per unit area is (Atlas -Device Simulation Framework., 2018): is the electron tunneling probability, E is longitudinal energy, ET is the transverse energy and ρ(ET) is the 2D density of states. fl and fr is the Fermi-Dirac function using the quasi Fermi-level on the left and right hand side of the junction, respectively. The equations of the quasi-Fermi level on the left hand side of the junction, the quasi-Fermi level on the right hand side of the junction, 2D density of states and the electron tunneling probability can be defined , respectively, by (Atlas -Device Simulation Framework., 2018): where m0 is the rest mass of an electron.
In order to calibrate the nonlocal band-to-band tunneling model in the device simulation, should be specified the its values including the rest mass of an electron, electron effective mass and hole effective mass (Atlas -Device Simulation Framework., 2018). These values are 0.32, 0.55 and 0.25 for the electron effective mass, hole effective mass and rest mass of an electron to fit with the experimental data ; Marjani and Hosseini, 2014(b)). On the other hand, multiple models were included for higher reliability of device simulation results including the Auger recombination, band-gap narrowing, Hurkx and Shockley-Read-Hall (SRH) recombination, the concentration and field dependent mobility and trap-assisted-tunneling. Figure. 1 illustrates a schematic view of the conventional III-V TFET and III-V TFET structure with source and channel heterojunctions, respectively. The body thickness and channel width are

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HOLOS, Ano 36, v.1, e8378, 2020 5 both 10 nm. The channel length is 30 nm. Aluminum is used to form the gate electrode with work function of 4.2 eV and ZrO2 is applied to the gate insulator with permittivity of 29ε0. The gate oxide is 2 nm. In III-V TFET structure with source and channel heterojunctions, the channel is made from a 3 nm InAs layer and a 12 nm InAsAlSb layer with doping density of 1×10 16 cm −3 . In addition, the source are made from a 1.2 nm AlGaSb layer and a 3.3 nm GaSb layer with doping density of 5×10 19 cm −3 . The drain are made from 10 nm InAsAlSb layer with doping density of 2×10 19 cm −3 . On the other hand, the added heterojunctions in the channel and source are InAs/InAsAlSb and AlGaSb/GaSb layers, respectively. Figure. 2 shows gate voltage dependence of logarithm scaled drain current for the conventional III-V TFET and III-V TFET structure with source and channel heterojunctions with gate length of 30 nm biased at drain voltage of 1 V. It can be seen that by introducing with source and channel heterojunctions, III-V TFET structure with source and channel heterojunctions has a higher on-state current around 1 decade about 10 -3 while maintaining off-state current of 10 -13 , resulting in higher on-current/off-current ratio of 10 10 as compared to conventional III-V TFET. Because of  two additional heterojunctions (one in the source and the other in the channel), the tunnel barrier height and tunnel distance significantly reduced. On the other hand, the low mass of an electron and bandgap in material of source and channel heterojunctions, the tunneling probability is increased. Therefore, the III-V TFET structure with source and channel heterojunctions has a higher drain current due to the increased tunneling probability. In addition, increased tunneling probability induced by source and channel heterojunctions, causes smaller subthreshold-swing of 30 mV/decade can be achieved in the III-V TFET structure with source and channel heterojunctions in comparison with that of conventional III-V TFET. Figure. 3 shows the comparison between the transconductances of the conventional III-V TFET and III-V TFET structure with source and channel heterojunctions with gate length of 30 nm biased at drain voltage of 1 V as a function of the gate voltage. As seen, the conductance of III-V TFET structure with source and channel heterojunctions increased by 450% at high gate voltage compared to that of the conventional III-V TFET because of the higher on-current.

RESULTS AND DISCUSSION
In order to much better analysis of the performance parameters, the subthreshold slope was defined as the average slope between the off-state current and threshold current as below (Marjani, et al., 2016(b)): where Vth is the threshold voltage and defined here by the constant current method at the point of 3×10 -7 A/µm, Ioff is defined to be the drain current at onset gate voltage, while on-current is defined at gate voltage of 0.7 V. These definitions are used in the rest of this paper. In order to investigate whether the source and channel heterojunctions effects were present when the feature size of the devices decreased, the performances of the III-V TFET structure with source and channel heterojunctions with different gate lengths were also examined. Except gate length, all factors are kept as similar in these simulations. Figure. 4 shows the performance comparison of the logarithm scaled on-current as a function of gate length for III-V TFET structure with source and channel heterojunctions at drain voltage of 1 V. It is evident that the on-current (tunneling from source to drain regions) increases as the gate length decreases from 90 to 15 nm. Figure. 5 shows the comparison of the off-current as a function of gate length for III-V TFET with source and channel heterojunctions at drain voltage of 1 V. As can be seen, variation in offcurrent is the dominant as compared with on-current. It should be mainly because of short-channel effects such as DIBL and charge sharing induced by down scaling of gate length.

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HOLOS, Ano 36, v.1, e8378, 2020 8  Figures. 6 and 7 show the plots for subthreshold-swing and on-current/off-current ratio as a function of different gate length for the III-V TFET structure with source and channel heterojunctions at drain voltage of 1 V, respectively. As can be seen, on-current/off-current ratio decreases and subthreshold-swing degrades with scaling down of gate length because of increasing off-current, as observed in Figure.

CONCLUSION
In this work, a detailed study of the III-V tunneling field-effect transistor (TFET) with source and channel heterojunctions is reported and introduced. The proposed structure is combination of the high tunneling efficiency induced by heterojunction material and the high mobility of III-V material. The III-V TFETs with source and channel heterojunctions have both shorter tunneling distance and two transmission resonances as compared to conventional III-V TFETs, that significantly improve the on-current. Furthermore, the transfer characteristics affected by gate length were evaluated. The results show that on-current, off-current, and on-current/off-current ratio and subthreshold-swing of III-V TFETs structure with source and channel heterojunctions are about 10 -3 A/µm, 10 -13 A/µm, 10 -10 and 30 mV/decade, respectively.